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ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

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1 0x00<br />

1000<br />

Advanced SIMD <strong>and</strong> VFP Instruction Encoding<br />

Vector Load VLD1 (single element to one lane) on page A8-604<br />

1100 Vector Load VLD1 (single element to all lanes) on page A8-606<br />

0x01<br />

1001<br />

Vector Load VLD2 (single 2-element structure to one lane) on page A8-610<br />

1101 Vector Load VLD2 (single 2-element structure to all lanes) on page A8-612<br />

0x10<br />

1010<br />

Vector Load VLD3 (single 3-element structure to one lane) on page A8-616<br />

1110 Vector Load VLD3 (single 3-element structure to all lanes) on page A8-618<br />

0x11<br />

1011<br />

Table A7-21 Element <strong>and</strong> structure load instructions (L == 1) (continued)<br />

A B Instruction See<br />

Vector Load VLD4 (single 4-element structure to one lane) on page A8-622<br />

1111 Vector Load VLD4 (single 4-element structure to all lanes) on page A8-624<br />

<strong>ARM</strong> DDI 0406B Copyright © 1996-1998, 2000, 2004-2008 <strong>ARM</strong> Limited. All rights reserved. A7-29

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