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ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

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Table A3-7 shows the effect of the operations shown in Figure A3-3 on page A3-18.<br />

Initial<br />

state a Operation b Effect<br />

Open CLREX(n),<br />

CLREX(!n)<br />

Application Level Memory Model<br />

Table A3-7 Effect of load/store operations on global monitor for processor(n)<br />

Final<br />

state a<br />

None Open<br />

StoreExcl(x,n) Does not update memory, returns status 1 Open<br />

LoadExcl(x,!n) Loads value from memory, no effect on tag address for processor(n) Open<br />

StoreExcl(x,!n) Depends on state machine <strong>and</strong> tag address for processor issuing<br />

STREX c<br />

Store(x,n),<br />

Store(x,!n)<br />

<strong>ARM</strong> DDI 0406B Copyright © 1996-1998, 2000, 2004-2008 <strong>ARM</strong> Limited. All rights reserved. A3-19<br />

Open<br />

Updates memory, no effect on monitor Open<br />

LoadExcl(x,n) Loads value from memory, tags address x Exclusive<br />

Exclusive LoadExcl(x,n) Loads value from memory, tags address x Exclusive<br />

CLREX(n) None. Effect on the final state is IMPLEMENTATION DEFINED.<br />

Exclusive e<br />

Open e<br />

CLREX(!n) None Exclusive<br />

StoreExcl(t,!n)<br />

Updates memory, returns status 0 c Open<br />

Does not update memory, returns status 1 c Exclusive<br />

StoreExcl(t,n) Updates memory, returns status 0 d<br />

StoreExcl(!t,n)<br />

Updates memory, returns status 0 e<br />

Does not update memory, returns status 1 e<br />

StoreExcl(!t,!n) Depends on state machine <strong>and</strong> tag address for processor issuing<br />

STREX<br />

Open<br />

Exclusive<br />

Open<br />

Exclusive<br />

Open<br />

Exclusive<br />

Exclusive

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