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ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

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Virtual Memory System <strong>Architecture</strong> (VMSA)<br />

Accessing the NSACR<br />

If multiple coprocessors are used to control a feature then the Non-secure access enable bits<br />

for those coprocessors must be set to the same value, otherwise behavior is UNPREDICTABLE.<br />

For example, when the VFP extension is implemented it is controlled by coprocessors 10<br />

<strong>and</strong> 11, <strong>and</strong> bits [10,11] of the NSACR must be set to the same value.<br />

For bits that correspond to coprocessors that are not implemented, it is IMPLEMENTATION<br />

DEFINED whether the bits:<br />

behave as RAZ/WI<br />

can be written by Secure privileged modes.<br />

To access the NSACR you read or write the CP15 registers with set to 0, set to c1, set to<br />

c1, <strong>and</strong> set to 2. For example:<br />

MRC p15,0,,c1,c1,2 ; Read CP15 Non-Secure Access Control Register<br />

MCR p15,0,,c1,c1,2 ; Write CP15 Non-Secure Access Control Register<br />

You can write to the NSACR only in Secure privileged modes.<br />

You can read the register in any privileged mode.<br />

B3-112 Copyright © 1996-1998, 2000, 2004-2008 <strong>ARM</strong> Limited. All rights reserved. <strong>ARM</strong> DDI 0406B

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