ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

DBGRESTART
DBGRESTARTED
The numbers in Figure A-1 have the following meanings:
Recommended External Debug Interface
Figure A-1 DBGRESTART / DBGRESTARTED handshake
1. If DBGRESTARTED is asserted HIGH the peripheral asserts DBGRESTART HIGH and waits for
DBGRESTARTED to go LOW
2. The processor drives DBGRESTARTED LOW to deassert the signal and waits for DBGRESTART
to go LOW
3. The peripheral drives DBGRESTART LOW to deassert the signal. This event indicates to the
processor that it can start the transition from Debug state to Non-debug state.
4. The processor leaves Debug state and asserts DBGRESTARTED HIGH.
In the process of leaving Debug state the processor normally deasserts the DBGACK, DBGTRIGGER,
and DBGCPUDONE signals. It is IMPLEMENTATION DEFINED when this change occurs relative to the
changes in DBGRESTART and DBGRESTARTED.
A.1.3 DBGACK and DBGCPUDONE
DBGACK and DBGCPUDONE are active-HIGH.
The processor asserts DBGACK to indicate that it is in Debug state. Therefore, the system can use
DBGACK as a handshake for EDBGRQ, instead of using DBGTRIGGER.
In v6 Debug and v6.1 Debug, the system can use DBGACK for cross-triggering.
1
2 3
Debug state Non-debug state
The processor asserts DBGCPUDONE only after it has completed all Non-debug state memory accesses.
Therefore the system can use DBGCPUDONE as an indicator that all memory accesses issued by the
processor result from operations performed by a debugger.
Figure A-2 on page AppxA-8 shows the signalling sequence for entry to Debug state. It is diagrammatic
only, and does not imply any timings.
ARM DDI 0406B Copyright © 1996-1998, 2000, 2004-2008 ARM Limited. All rights reserved. AppxA-7
4