ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

Instruction Details
A8.6.138 RFE
Return From Exception is a system instruction. For details see RFE on page B6-16.
A8.6.139 ROR (immediate)
Rotate Right (immediate) provides the value of the contents of a register rotated by a constant value. The
bits that are rotated off the right end are inserted into the vacated bit positions on the left. It can optionally
update the condition flags based on the result.
Encoding T1 ARMv6T2, ARMv7
ROR{S} ,,#
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
1 1 1 0 1 0 1 0 0 1 0 S 1 1 1 1 (0) imm3 Rd imm2 1 1 Rm
if (imm3:imm2) == ‘00000’ then SEE RRX;
d = UInt(Rd); m = UInt(Rm); setflags = (S == ‘1’);
(-, shift_n) = DecodeImmShift(‘11’, imm3:imm2);
if BadReg(d) || BadReg(m) then UNPREDICTABLE;
Encoding A1 ARMv4*, ARMv5T*, ARMv6*, ARMv7
ROR{S} ,,#
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
cond 0 0 0 1 1 0 1 S (0)(0)(0)(0) Rd imm5 1 1 0 Rm
if imm5 == ‘00000’ then SEE RRX;
d = UInt(Rd); m = UInt(Rm); setflags = (S == ‘1’);
(-, shift_n) = DecodeImmShift(‘11’, imm5);
A8-278 Copyright © 1996-1998, 2000, 2004-2008 ARM Limited. All rights reserved. ARM DDI 0406B