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ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

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I.7.21 Hint_PreloadData()<br />

This procedure performs a preload data hint.<br />

Hint_PreloadData(bits(32) address)<br />

I.7.22 Hint_PreloadDataForWrite()<br />

This procedure performs a preload data hint with a probability that the use will be for a write.<br />

Hint_PreloadDataForWrite(bits(32) address<br />

I.7.23 Hint_PreloadInstr()<br />

This procedure performs a preload instructions hint.<br />

Hint_PreloadInstr(bits(32) address)<br />

I.7.24 Hint_Yield()<br />

This procedure performs a Yield hint.<br />

I.7.25 IntegerZeroDivideTrappingEnabled()<br />

Pseudocode Definition<br />

This function returns TRUE if the trapping of divisions by zero in the integer division instructions SDIV <strong>and</strong><br />

UDIV is enabled, <strong>and</strong> FALSE otherwise.<br />

In the <strong>ARM</strong>v7-R profile, this is controlled by the SCTLR.DZ bit, see c1, System Control Register (SCTLR)<br />

on page B4-45. TRUE is returned if the bit is 1 <strong>and</strong> FALSE if it is 0. This function is never called in the A<br />

profile.<br />

boolean IntegerZeroDivideTrappingEnabled()<br />

I.7.26 IsExternalAbort()<br />

This function returns TRUE if the abort currently being processed is an external abort <strong>and</strong> FALSE otherwise.<br />

It is only used in abort exception entry pseudocode.<br />

boolean IsExternalAbort()<br />

I.7.27 JazelleAcceptsExecution()<br />

This function indicates whether Jazelle hardware will take over execution when a BXJ instruction is executed.<br />

boolean JazelleAcceptsExecution()<br />

<strong>ARM</strong> DDI 0406B Copyright © 1996-1998, 2000, 2004-2008 <strong>ARM</strong> Limited. All rights reserved. AppxI-25

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