ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

Debug Registers Reference
Security state control, bits [15:14], when the Security Extensions are implemented
Note
The Security Extensions cannot be implemented with v6 Debug.
When a processor implements the Security Extensions, these bits enable the breakpoint to
be conditional on the security state of the processor:
0b00 breakpoint generated on match in both Non-secure state and Secure state
0b01 breakpoint generated on match only in Non-secure state
0b10 breakpoint generated on match only in Secure state
0b11 Reserved.
This field must be programmed to 0b00 if the DBGBVR meaning field, bits [22:20], is
programmed for Linked Context ID match.
For more information about breakpoint matching when this field is set to a value other than
0b00, see About security state control on page C10-66.
See also Generation of debug events on page C3-40.
Bits [15:14], when the Security Extensions are not implemented
Reserved, UNK/SBZP.
Byte address select, bits [8:5]
This field enables match or mismatch comparisons on only certain bytes of the word address
held in the DBGBVR. The operation of this field depends also on:
the DBGBVR meaning field being programmed for IVA match or mismatch
in v7 Debug, the Address range mask field being programmed to 0b00000, no mask
the instruction set state of the processor, indicated by the CPSR.J and CPSR.T bits.
For details of the use of this field see Byte address selection behavior on IVA match or
mismatch on page C10-55.
This field must be programmed to 0b1111 if either:
the DBGBVR meaning field, bits [22:20], is programmed for Linked or Unlinked
Context ID match
in v7 Debug, the Address range mask field, bits [28:24], is programmed to a value
other than 0b00000.
If this is not done, the generation of Breakpoint debug events is UNPREDICTABLE.
Privileged mode control, bits [2:1]
This field enables breakpoint matching conditional on the mode of the processor. Possible
values of this field are:
0b00 Match any of User, System and Supervisor modes.
This value is supported in v7 Debug only.
0b01 Match in any privileged mode.
0b10 Match in User mode only.
C10-54 Copyright © 1996-1998, 2000, 2004-2008 ARM Limited. All rights reserved. ARM DDI 0406B