ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

Debug Register Interfaces
The Debug architecture does not require implementation of the recommended interface. However:
the ARM RealView tools require the recommended interface
ARM recommends this interface for compatibility with other tool chains.
C6.1.3 The Debug Communications Channel (DCC)
The debug register interface includes the Debug Communications Channel (DCC). This is accessed through
two physical registers:
DBGDTRTX, for data transfers from the processor to an external debugger
DBGDTRRX, for data transfers from the external debugger to the processor.
In addition, there are four DCC status flags in the DBGDSCR:
TXfull and TXfull_l, indicating the DBGDTRTX status
RXfull and RXfull_l, indicating the DBGDTRRX status.
There are separate internal and external views of the DBGDSCR, and of the DBGDTRTX and DBGDTRRX
Registers:
DBGDTRTXint, DBGDTRRXint and DBGDSCRint provide the internal view
DBGDTRTXext, DBGDTRRXext and DBGDSCRext provide the external view.
For more information, see Internal and external views of the DBGDSCR and the DCC registers on
page C6-21.
Note
In previous descriptions of the DCC, the term DTR (Data Transfer Register) is used to describe the DCC
data registers. In those descriptions, the DBGDTRTX Register is named wDTR, and the DBGDTRRX
Register is named rDTR.
ARM DDI 0406B Copyright © 1996-1998, 2000, 2004-2008 ARM Limited. All rights reserved. C6-3