ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

Assembler syntax
SMLAL{S} , , ,
where:
Instruction Details
S If S is present, the instruction updates the flags. Otherwise, the flags are not updated.
S can be specified only for the ARM instruction set.
See Standard assembler syntax fields on page A8-7.
Supplies the lower 32 bits of the accumulate value, and is the destination register for the
lower 32 bits of the result.
Supplies the upper 32 bits of the accumulate value, and is the destination register for the
upper 32 bits of the result.
The first operand register.
The second operand register.
The pre-UAL syntax SMLALS is equivalent to SMLALS.
Operation
if ConditionPassed() then
EncodingSpecificOperations();
result = SInt(R[n]) * SInt(R[m]) + SInt(R[dHi]:R[dLo]);
R[dHi] = result;
R[dLo] = result;
if setflags then
APSR.N = result;
APSR.Z = IsZeroBit(result);
if ArchVersion() == 4 then
APSR.C = bit UNKNOWN;
APSR.V = bit UNKNOWN;
// else APSR.C, APSR.V unchanged
Exceptions
None.
ARM DDI 0406B Copyright © 1996-1998, 2000, 2004-2008 ARM Limited. All rights reserved. A8-335