ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

Virtual Memory System Architecture (VMSA)
The format of the CONTEXTIDR is:
31 8 7 0
PROCID ASID
PROCID, bits [31:8]
Process Identifier. This field must be programmed with a unique value that identifies the
current process. It is used by the trace logic and the debug logic to identify the process that
is running currently.
ASID, bits [7:0]
Address Space Identifier. This field is programmed with the value of the current ASID.
Using the CONTEXTIDR
For information about the synchronization of changes to the CONTEXTIDR see Changes to CP15 registers
and the memory order model on page B3-77. There are particular synchronization requirements when
changing the ASID and Translation Table Base Registers, see Synchronization of changes of ASID and
TTBR on page B3-60.
Accessing the CONTEXTIDR
To access the CONTEXTIDR you read or write the CP15 registers with set to 0, set to c13,
set to c0, and set to 1. For example:
MRC p15,0,,c13,c0,1 ; Read CP15 Context ID Register
MCR p15,0,,c13,c0,1 ; Write CP15 Context ID Register
B3.12.46 CP15 c13 Software Thread ID registers
The Software Thread ID registers provide locations where software can store thread identifying information,
for OS management purposes. These registers are never updated by the hardware.
The Software Thread ID registers are:
three 32-bit register read/write registers:
— User Read/Write Thread ID Register, TPIDRURW
— User Read-only Thread ID Register, TPIDRURO
— Privileged Only Thread ID Register, TPIDRPRW.
accessible in different modes:
— the User Read/Write Thread ID Register is read/write in unprivileged and privileged modes
— the User Read-only Thread ID Register is read-only in User mode, and read/write in privileged
modes
— the Privileged Only Thread ID Register is only accessible in privileged modes, and is
read/write.
when the Security Extensions are implemented, Banked registers
introduced in ARMv7.
B3-154 Copyright © 1996-1998, 2000, 2004-2008 ARM Limited. All rights reserved. ARM DDI 0406B