ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

C9.5 Interaction with Security Extensions
Performance Monitors
The performance monitors provide a non-invasive debug feature, and therefore are controlled by the
non-invasive debug authentication signals. About non-invasive debug authentication on page C7-2 describes
how non-invasive debug interacts with Security Extensions.
Performance monitors on page C7-6 describes the behavior of the performance monitors when:
non-invasive debug is disabled
the processor is in a mode or state where non-invasive debug is not permitted
the processor is in Debug state.
Note
Additional controls in the PMCR can also disable the event counters and the PMCCNTR. Disabling the
event counters and the PMCCNTR in the PMCR takes precedence over the authentication controls.
The performance monitor registers are Common registers, see Common CP15 registers on page B3-74.
They are always accessible regardless of the values of the authentication signals and SUNIDEN.
Authentication controls whether the counters count events, not to control access to the performance monitor
registers.
ARM DDI 0406B Copyright © 1996-1998, 2000, 2004-2008 ARM Limited. All rights reserved. C9-7