ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

Assembler syntax
STRT , [ {, #}] Offset: Thumb only
STRT , [] {, #+/-} Post-indexed: ARM only
STRT , [], +/- {, } Post-indexed: ARM only
where:
See Standard assembler syntax fields on page A8-7.
Instruction Details
The source register. In the ARM instruction set, the PC can be used. However, use of the PC
is deprecated.
The base register. The SP can be used.
+/- Is + or omitted if or the optionally shifted value of is to be added to the base
register value (add == TRUE), or – if it is to be subtracted (permitted in ARM code only,
add == FALSE).
The immediate offset applied to the value of . Values are 0-255 for encoding T1, and
0-4095 for encoding A1. can be omitted, meaning an offset of 0.
Contains the offset that is optionally shifted and added to the value of to form the
address.
The shift to apply to the value read from . If omitted, no shift is applied. Shifts applied
to a register on page A8-10 describes the shifts and how they are encoded.
The pre-UAL syntax STRT is equivalent to STRT.
Operation
if ConditionPassed() then
EncodingSpecificOperations(); NullCheckIfThumbEE(n);
offset = if register_form then Shift(R[m], shift_t, shift_n, APSR.C) else imm32;
offset_addr = if add then (R[n] + offset) else (R[n] - offset);
address = if postindex then R[n] else offset_addr;
if t == 15 then // Only possible for encodings A1 and A2
data = PCStoreValue();
else
data = R[t];
if UnalignedSupport() || address == ‘00’ || CurrentInstrSet() == InstrSet_ARM then
MemU_unpriv[address,4] = data;
else // Can only occur before ARMv7
MemU_unpriv[address,4] = bits(32) UNKNOWN;
if postindex then R[n] = offset_addr;
Exceptions
Data Abort.
ARM DDI 0406B Copyright © 1996-1998, 2000, 2004-2008 ARM Limited. All rights reserved. A8-417