ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

Common Memory System Architecture Features
// DefaultTEXDecode()
// ==================
MemoryAttributes DefaultTEXDecode(bits(5) texcb, bit S)
MemoryAttributes memattrs;
case texcb of
when ‘00000’
memattrs.type = MemType_StronglyOrdered;
memattrs.innerattrs = ‘00’; // Non-cacheable
memattrs.outerattrs = ‘00’; // Non-cacheable
memattrs.shareable = TRUE;
when ‘00001’
memattrs.type = MemType_Device;
memattrs.innerattrs = ‘00’; // Non-cacheable
memattrs.outerattrs = ‘00’; // Non-cacheable
memattrs.shareable = TRUE;
when ‘0001x’, ‘00100’
memattrs.type = MemType_Normal;
memattrs.innerattrs = texcb;
memattrs.outerattrs = texcb;
memattrs.shareable = (S == ‘1’);
when ‘00110’
IMPLEMENTATION_DEFINED setting of memattrs;
when ‘00111’
memattrs.type = MemType_Normal;
memattrs.innerattrs = ‘01’; // Write-back write-allocate cacheable
memattrs.outerattrs = ‘01’; // Write-back write-allocate cacheable
memattrs.shareable = (S == ‘1’);
when ‘01000’
memattrs.type = MemType_Device;
memattrs.innerattrs = ‘00’; // Non-cacheable
memattrs.outerattrs = ‘00’; // Non-cacheable
memattrs.shareable = FALSE;
when ‘1xxxx’
memattrs.type = MemType_Normal;
memattrs.innerattrs = texcb;
memattrs.outerattrs = texcb;
memattrs.shareable = (S == ‘1’);
otherwise
UNPREDICTABLE;
memattrs.outershareable = memattrs.shareable;
return memattrs;
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