05.02.2013 Views

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

SHOW MORE
SHOW LESS

Create successful ePaper yourself

Turn your PDF publications into a flip-book with our unique Google optimized e-Paper software.

Glossary<br />

Conditional execution<br />

Means that if the condition code flags indicate that the corresponding condition is true when the instruction<br />

starts executing, it executes normally. Otherwise, the instruction does nothing.<br />

Configuration<br />

Settings made on reset, or immediately after reset, <strong>and</strong> normally expected to remain static throughout<br />

program execution.<br />

Context switch<br />

Is the saving <strong>and</strong> restoring of computational state when switching between different threads or processes. In<br />

this manual, the term context switch is used to describe any situations where the context is switched by an<br />

operating system <strong>and</strong> might or might not include changes to the address space.<br />

Data cache<br />

Is a separate cache used only for processing data loads <strong>and</strong> stores.<br />

Digital signal processing (DSP)<br />

Refers to a variety of algorithms that are used to process signals that have been sampled <strong>and</strong> converted to<br />

digital form. Saturated arithmetic is often used in such algorithms.<br />

Direct-mapped cache<br />

Is a one-way set-associative cache. Each cache set consists of a single cache line, so cache look-up just needs<br />

to select <strong>and</strong> check one cache line.<br />

Direct Memory Access<br />

Is an operation that accesses main memory directly, without the processor performing any accesses to the<br />

data concerned.<br />

DNM See Do-not-modify.<br />

Domain Is a collection of sections, Large pages <strong>and</strong> Small pages of memory, that can have their access permissions<br />

switched rapidly by writing to the Domain Access Control Register, in CP15 c3.<br />

Do-not-modify (DNM)<br />

Means the value must not be altered by software. DNM fields read as UNKNOWN values, <strong>and</strong> must only be<br />

written with the same value read from the same field on the same processor.<br />

Double-precision value<br />

Consists of two 32-bit words that must appear consecutively in memory <strong>and</strong> must both be word-aligned, <strong>and</strong><br />

that is interpreted as a basic double-precision floating-point number according to the IEEE 754-1985<br />

st<strong>and</strong>ard.<br />

Doubleword<br />

Is a 64-bit data item. Doublewords are normally at least word-aligned in <strong>ARM</strong> systems.<br />

Doubleword-aligned<br />

Means that the address is divisible by 8.<br />

DSP See Digital signal processing<br />

Endianness<br />

Is an aspect of the system memory mapping. See big-endian <strong>and</strong> little-endian.<br />

Glossary-4 Copyright © 1996-1998, 2000, 2004-2008 <strong>ARM</strong> Limited. All rights reserved. <strong>ARM</strong> DDI 0406B

Hooray! Your file is uploaded and ready to be published.

Saved successfully!

Ooh no, something went wrong!