ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

Instruction Details
A8.6.123 PUSH
Push Multiple Registers stores multiple registers to the stack, storing to consecutive memory locations
ending just below the address in SP, and updates SP to point to the start of the stored data.
Encoding T1 ARMv4T, ARMv5T*, ARMv6*, ARMv7
PUSH
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
1 0 1 1 0 1 0 M register_list
registers = ‘0’:M:’000000’:register_list;
if BitCount(registers) < 1 then UNPREDICTABLE;
Encoding T2 ARMv6T2, ARMv7
PUSH.W contains more than one register
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
1 1 1 0 1 0 0 0 1 0 1 0 1 1 0 1 (0) M (0) register_list
registers = ‘0’:M:’0’:register_list;
if BitCount(registers) < 2 then UNPREDICTABLE;
Encoding T3 ARMv6T2, ARMv7
PUSH.W contains one register,
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
1 1 1 1 1 0 0 0 0 1 0 0 1 1 0 1 Rt 1 1 0 1 0 0 0 0 0 1 0 0
t = UInt(Rt); registers = Zeros(16); registers = ‘1’;
if BadReg(t) then UNPREDICTABLE;
Encoding A1 ARMv4*, ARMv5T*, ARMv6*, ARMv7
PUSH contains more than one register
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
cond 1 0 0 1 0 0 1 0 1 1 0 1 register_list
if BitCount(register_list) < 2 then SEE STMDB / STMFD;
registers = register_list;
Encoding A2 ARMv4*, ARMv5T*, ARMv6*, ARMv7
PUSH contains one register,
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
cond 0 1 0 1 0 0 1 0 1 1 0 1 Rt 0 0 0 0 0 0 0 0 0 1 0 0
t = UInt(Rt); registers = Zeros(16); registers = ‘1’;
if t == 13 then UNPREDICTABLE;
A8-248 Copyright © 1996-1998, 2000, 2004-2008 ARM Limited. All rights reserved. ARM DDI 0406B