ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

The CPUID Identification Scheme
TCM support, bits [19:16]
Indicates support for TCMs and associated DMAs. Permitted values are:
0b0000 Not supported.
0b0001 Support is IMPLEMENTATION DEFINED. ARMv7 requires this setting.
0b0010 Support for TCM only, ARMv6 implementation.
0b0011 Support for TCM and DMA, ARMv6 implementation.
Note
An ARMv7 implementation might include an ARMv6 model for TCM support. However,
in ARMv7 this is an IMPLEMENTATION DEFINED option, and therefore it must be represented
by the 0b0001 encoding in this field.
Shareability levels, bits [15:12]
Indicates the number of shareability levels implemented. Permitted values are:
0b0000 One level of shareability implemented.
0b0001 Two levels of shareability implemented.
Outermost shareability, bits [11:8]
PMSA support, bits [7:4]
VMSA support, bits [3:0]
Indicates the outermost shareability domain implemented. Permitted values are:
0b0000 Implemented as Non-cacheable.
0b0001 Implemented with hardware coherency support.
0b1111 Shareability ignored.
Indicates support for a PMSA. Permitted values are:
0b0000 Not supported.
0b0001 Support for IMPLEMENTATION DEFINED PMSA.
0b0010 Support for PMSAv6, with a Cache Type Register implemented.
0b0011 Support for PMSAv7, with support for memory subsections. ARMv7-R profile.
When the PMSA support field is set to a value other than 0b0000 the VMSA support field
must be set to 0b0000.
Indicates support for a VMSA. Permitted values are:
0b0000 Not supported.
0b0001 Support for IMPLEMENTATION DEFINED VMSA.
0b0010 Support for VMSAv6, with Cache and TLB Type Registers implemented.
0b0011 Support for VMSAv7, with support for remapping and the access flag.
ARMv7-A profile.
When the VMSA support field is set to a value other than 0b0000 the PMSA support field
must be set to 0b0000.
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