05.02.2013 Views

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

SHOW MORE
SHOW LESS

You also want an ePaper? Increase the reach of your titles

YUMPU automatically turns print PDFs into web optimized ePapers that Google loves.

Assembler syntax<br />

STRB , [, {, }] Offset: index==TRUE, wback==FALSE<br />

STRB , [, {, }]! Pre-indexed: index==TRUE, wback==TRUE<br />

STRB , [], {, } Post-indexed: index==FALSE, wback==TRUE<br />

where:<br />

See St<strong>and</strong>ard assembler syntax fields on page A8-7.<br />

The source register.<br />

Instruction Details<br />

The base register. The SP can be used. In the <strong>ARM</strong> instruction set, for offset addressing only,<br />

the PC can be used. However, use of the PC is deprecated.<br />

+/- Is + or omitted if the optionally shifted value of is to be added to the base register value<br />

(add == TRUE), or – if it is to be subtracted (permitted in <strong>ARM</strong> code only, add == FALSE).<br />

Contains the offset that is optionally shifted <strong>and</strong> added to the value of to form the<br />

address.<br />

The shift to apply to the value read from . If present, encoding T1 is not permitted. If<br />

absent, no shift is applied <strong>and</strong> all encodings are permitted. For encoding T2, can<br />

only be omitted, encoded as imm2 = 0b00, or LSL # with = 1, 2, or 3, <strong>and</strong> <br />

encoded in imm2. For encoding A1, see Shifts applied to a register on page A8-10.<br />

The pre-UAL syntax STRB is equivalent to STRB.<br />

Operation<br />

if ConditionPassed() then<br />

EncodingSpecificOperations(); NullCheckIfThumbEE(n);<br />

offset = Shift(R[m], shift_t, shift_n, APSR.C);<br />

offset_addr = if add then (R[n] + offset) else (R[n] - offset);<br />

address = if index then offset_addr else R[n];<br />

MemU[address,1] = R[t];<br />

if wback then R[n] = offset_addr;<br />

Exceptions<br />

Data Abort.<br />

<strong>ARM</strong> DDI 0406B Copyright © 1996-1998, 2000, 2004-2008 <strong>ARM</strong> Limited. All rights reserved. A8-393

Hooray! Your file is uploaded and ready to be published.

Saved successfully!

Ooh no, something went wrong!