05.02.2013 Views

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

SHOW MORE
SHOW LESS

You also want an ePaper? Increase the reach of your titles

YUMPU automatically turns print PDFs into web optimized ePapers that Google loves.

Debug Events<br />

Interaction of IVA mismatch breakpoints with other breakpoints <strong>and</strong> Vector Catch<br />

When a BRPn is programmed for IVA mismatch <strong>and</strong> does not generate a Breakpoint debug event because<br />

the general conditions specified in DBGBCRn are not met, this does not affect the generation of:<br />

Breakpoint debug events by other BRPs<br />

Vector Catch debug events.<br />

Note<br />

In this context, the general conditions specified in DBGBCR not being met means that at least one of the<br />

following applies:<br />

the BRP is not enabled<br />

the Privileged mode control bits of the DBGBCR do not match the mode of the processor<br />

DBGBCR is configured for linked Context ID matching but the linked BRP either is not enabled or<br />

does not match the current Context ID<br />

the Security Extensions are implemented, <strong>and</strong> the Security state control field of DBGBCR does not<br />

match the security state of the processor.<br />

However, if the general conditions specified in DBGBCRn are met, <strong>and</strong> BRPn does not generate a<br />

Breakpoint debug event only because the IVA fails the comparison required for an IVA mismatch, then the<br />

failure of this comparison can affect the generation of other debug events:<br />

if any other BRP, BRPm, hits on its required comparison with the IVA <strong>and</strong> meets the general<br />

conditions specified in DBGBCRm, it is UNPREDICTABLE whether BRPm generates a Breakpoint<br />

debug event<br />

if the Vector Catch Register defines a Vector Catch that matches the IVA, it is UNPREDICTABLE<br />

whether a Vector Catch debug event is generated.<br />

Generation of IVA mismatch breakpoints on branch to self instructions<br />

This section describes the generation of Breakpoint debug events when the IVA of an instruction that<br />

branches to itself misses a BRP programmed for IVA mismatch, <strong>and</strong> all the general conditions specified in<br />

the DBGBCR are met. See the IVA mismatch column of Table C10-11 on page C10-56 for details of when<br />

an IVA mismatch comparison misses. In this case:<br />

1. The first time the instruction is committed for execution the BRP does not generate a Breakpoint<br />

debug event.<br />

2. Because the instruction branches to itself, if no exception is generated, the instruction is committed<br />

for execution again. On this <strong>and</strong> any subsequent execution, it is UNPREDICTABLE whether the BRP<br />

generates a Breakpoint debug event.<br />

C3-14 Copyright © 1996-1998, 2000, 2004-2008 <strong>ARM</strong> Limited. All rights reserved. <strong>ARM</strong> DDI 0406B

Hooray! Your file is uploaded and ready to be published.

Saved successfully!

Ooh no, something went wrong!