ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

Instruction Details
A8.6.122 POP
Pop Multiple Registers loads multiple registers from the stack, loading from consecutive memory locations
starting at the address in SP, and updates SP to point just above the loaded data.
Encoding T1 ARMv4T, ARMv5T*, ARMv6*, ARMv7
POP
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
1 0 1 1 1 1 0 P register_list
registers = P:’0000000’:register_list; if BitCount(registers) < 1 then UNPREDICTABLE;
Encoding T2 ARMv6T2, ARMv7
POP.W contains more than one register
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
1 1 1 0 1 0 0 0 1 0 1 1 1 1 0 1 P M (0) register_list
registers = P:M:’0’:register_list;
if BitCount(registers) < 2 || (P == ‘1’ && M == ‘1’) then UNPREDICTABLE;
if registers == ‘1’ && InITBlock() && !LastInITBlock() then UNPREDICTABLE;
Encoding T3 ARMv6T2, ARMv7
POP.W contains one register,
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
1 1 1 1 1 0 0 0 0 1 0 1 1 1 0 1 Rt 1 0 1 1 0 0 0 0 0 1 0 0
t = UInt(Rt); registers = Zeros(16); registers = ‘1’;
if t == 13 || (t == 15 && InITBlock() && !LastInITBlock()) then UNPREDICTABLE;
Encoding A1 ARMv4*, ARMv5T*, ARMv6*, ARMv7
POP contains more than one register
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
cond 1 0 0 0 1 0 1 1 1 1 0 1 register_list
if BitCount(register_list) < 2 then SEE LDM / LDMIA / LDMFD;
registers = register_list;
if registers == ‘1’ && ArchVersion() >= 7 then UNPREDICTABLE;
Encoding A2 ARMv4*, ARMv5T*, ARMv6*, ARMv7
POP contains one register,
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
cond 0 1 0 0 1 0 0 1 1 1 0 1 Rt 0 0 0 0 0 0 0 0 0 1 0 0
t = UInt(Rt); registers = Zeros(16); registers = ‘1’;
if t == 13 then UNPREDICTABLE;
A8-246 Copyright © 1996-1998, 2000, 2004-2008 ARM Limited. All rights reserved. ARM DDI 0406B