ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARMv6 Differences
TCM CP15 configuration and control
In ARMv7, a TCM Type Register is required. However, its format can be compatible with ARMv6 or
IMPLEMENTATION DEFINED. For more information, see c0, TCM Type Register (TCMTR) on page B3-85.
In ARMv6, CP15 c0 and c9 registers configure and control the TCMs in a system. For more information,
see:
c0, TCM Type Register (TCMTR) on page AppxG-33
c9, TCM support on page AppxG-46.
Note
In addition to the basic TCM support model in ARMv6, a set of range operations that can operate on caches
and TCMs are documented. Range operations are considered optional in ARMv6. See Block transfer
operations on page AppxG-41.
The ARM Architecture Reference Manual (DDI 0100) described an ARMv6 feature known as SmartCache,
and a level 1 DMA model associated with TCM support. Both of these features are considered as
IMPLEMENTATION DEFINED, and are not described in this manual.
In some implementations of ARMv4 and ARMv5, bits in the CP15 System Control Register, SCTLR[19:16]
or a subset, are used for TCM control. From ARMv6 these bits have fixed values, and no SCTLR bits are
used for TCM control.
G.6.4 Virtual memory support
A key component of the Virtual Memory System Architecture (VMSA) is the use of translation tables.
ARMv6 supports two formats of virtual memory translation table:
a legacy format for ARMv4 and ARMv5 compatibility
a revised format, called the VMSAv6 format, that is also used in ARMv7.
Both table formats support use of the Fast Context Switch Extension (FCSE), but ARM deprecates use of
the FCSE, and the FCSE is optional in ARMv7. For the differences in VMSAv6 format support between
ARMv6 and ARMv6K, see VMSAv6 translation table format on page AppxG-26.
Note
ARMv7 does not support the legacy format.
ARMv7 VMSA support is the same as that supported by the revised format in ARMv6K, except for
the address mapping restrictions described:
— for ARMv6 in Virtual to physical translation mapping restrictions on page AppxG-26
— for ARMv7 in Address mapping restrictions on page B3-23.
For more information about the FCSE see Appendix E Fast Context Switch Extension (FCSE).
AppxG-24 Copyright © 1996-1998, 2000, 2004-2008 ARM Limited. All rights reserved. ARM DDI 0406B