ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

c9, TCM Region Registers (DTCMRR and ITCMRR)
The TCM Region Registers provide control and configuration information for each TCM region.
Each TCM Region Register is:
A 32-bit read/write register with some bits that are read-only.
Accessible only in privileged modes.
ARMv6 Differences
When the Security Extensions are implemented, a Configurable access register with Non-secure
access controlled by the DTCM-NSACR. See c9, TCM Non-Secure Access Control Registers,
DTCM-NSACR and ITCM-NSACR on page AppxG-51.
Accessed by reading or writing the CP15 registers with set to 0, set to c9, set to
c1, and set to:
— 0 for the current Data TCM Region Register
— 1 for the current Instruction or unified Region Register.
For example:
MRC p15,0,,c9,c1,0 ; Read current Data TCM Region Register
MCR p15,0,,c9,c1,0 ; Write current Data TCM Region Register
MRC p15,0,,c9,c1,1 ; Read current Instruction or unified TCM Region Register
MCR p15,0,,c9,c1,1 ; Write current Instruction or unified TCM Region Register
The format of the TCM region registers is:
31 12 11 7 6 2 1 0
BaseAddress Reserved Size (0) En
BaseAddress, bits [31:12]
Bits [11:7] Reserved
The base address of the TCM, given as the physical address of the TCM in the memory map.
BaseAddress is assumed to be aligned to the size of the TCM. Any address bits in the range
[(log2(RAMSize)-1):12] are ignored.
BaseAddress is 0 at reset.
Size, bits [6:2]
Indicates the size of the TCM. See Table G-12 on page AppxG-48 for encoding of this field.
This field is read-only and ignores writes.
En, bit [0] TCM enable bit:
En == 0 Disabled. This is the reset value.
En == 1 Enabled.
ARM DDI 0406B Copyright © 1996-1998, 2000, 2004-2008 ARM Limited. All rights reserved. AppxG-47