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ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

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Assembler syntax<br />

LDRH , Normal form<br />

LDRH , [PC, #+/-] Alternative form<br />

where:<br />

See St<strong>and</strong>ard assembler syntax fields on page A8-7.<br />

The destination register.<br />

Instruction Details<br />

The label of the literal data item that is to be loaded into . The assembler calculates the<br />

required value of the offset from the Align(PC,4) value of the ADR instruction to this label.<br />

Permitted values of the offset are:<br />

Encoding T1 any value in the range -4095 to 4095<br />

Encoding A1 any value in the range -255 to 255.<br />

If the offset is zero or positive, imm32 is equal to the offset <strong>and</strong> add == TRUE.<br />

If the offset is negative, imm32 is equal to minus the offset <strong>and</strong> add == FALSE.<br />

The alternative syntax permits the addition or subtraction of the offset <strong>and</strong> the immediate offset to be<br />

specified separately, including permitting a subtraction of 0 that cannot be specified using the normal<br />

syntax. For more information, see Use of labels in UAL instruction syntax on page A4-5.<br />

The pre-UAL syntax LDRH is equivalent to LDRH.<br />

Operation<br />

if ConditionPassed() then<br />

EncodingSpecificOperations(); NullCheckIfThumbEE(15);<br />

base = Align(PC,4);<br />

address = if add then (base + imm32) else (base - imm32);<br />

data = MemU[address,2];<br />

if UnalignedSupport() || address = ‘0’ then<br />

R[t] = ZeroExtend(data, 32);<br />

else // Can only apply before <strong>ARM</strong>v7<br />

R[t] = bits(32) UNKNOWN;<br />

Exceptions<br />

Data Abort.<br />

<strong>ARM</strong> DDI 0406B Copyright © 1996-1998, 2000, 2004-2008 <strong>ARM</strong> Limited. All rights reserved. A8-155

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