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ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

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Instruction Details<br />

A8.6.330 VMOV (between <strong>ARM</strong> core register <strong>and</strong> single-precision register)<br />

This instruction transfers the contents of a single-precision VFP register to an <strong>ARM</strong> core register, or the<br />

contents of an <strong>ARM</strong> core register to a single-precision VFP register.<br />

Encoding T1 / A1 VFPv2, VFPv3<br />

VMOV , <br />

VMOV , <br />

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0<br />

1 1 1 0 1 1 1 0 0 0 0 op Vn Rt 1 0 1 0 N (0)(0) 1 (0)(0)(0)(0)<br />

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0<br />

cond 1 1 1 0 0 0 0 op Vn Rt 1 0 1 0 N (0)(0) 1 (0)(0)(0)(0)<br />

to_arm_register = (op == ‘1’); t = UInt(Rt); n = UInt(Vn:N);<br />

if t == 15 || (CurrentInstrSet() != InstrSet_<strong>ARM</strong> && t == 13) then UNPREDICTABLE;<br />

A8-648 Copyright © 1996-1998, 2000, 2004-2008 <strong>ARM</strong> Limited. All rights reserved. <strong>ARM</strong> DDI 0406B

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