ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

F.4 VFP instruction type selection
Destination
register bank
VFP Vector Operation Support
Table F-2 shows how the selection of registers in an instruction controls the operation of the instruction.
1st operand
bank
2nd operand
bank
If the instruction has two operands:
Destination
type
1st operand
type
Scalar Any Any Scalar Scalar Scalar
Vector Any Scalar Vector Vector Scalar
Vector Any Vector Vector Vector Vector
Scalar Any None Scalar Scalar -
Vector Scalar None Vector Scalar -
Vector Vector None Vector Vector -
Table F-2
2nd operand
type
— If the destination register is in a scalar register bank, the operands and result are all scalars.
— If the destination register is in a vector register bank and the second operand is in a scalar bank,
the second operand is a scalar, but both the destination and the first operand are vectors. Each
element of the result is produced by an operation on the corresponding element of the first
operand and the same scalar.
— If the destination register and the second operand are both in vector register banks, the
operands and result are all vectors. Each element of the result is produced by an operation on
corresponding elements of both operands.
If the instruction has one operand:
— If the destination register is in a scalar register bank, the operand and result are both scalars.
— If the destination register is in a vector register bank and the operand is in a scalar bank, the
result is a vector and the operand is a scalar. The result is duplicated to each element of the
destination vector.
— If the destination register and the operand are both in vector register banks, the operand and
result are both vectors. Each element of the result is produced by an operation on the
corresponding element of the operand.
Some VFP instructions have three operands, but in these cases one of the operand vectors is also the result
vector. They operate in the same way as two operand instructions.
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