ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARMv4 and ARMv5 Differences
H.3 Application level memory support
Memory support covers address alignment, endian support, semaphore support, memory type, memory
order model, caches, and write buffers.
H.3.1 Alignment
ARMv4 and ARMv5 behave differently from ARMv7 for unaligned memory accesses. The behavior is the
same as ARMv6 legacy mode except for forcing alignment checks with SCTLR.A == 1.
For more information about the SCTLR see c1, System Control Register (SCTLR) on page AppxH-39.
For ARM instructions when SCTLR.A == 0:
Non halfword-aligned LDRH, LDRSH, and STRH are UNPREDICTABLE.
Non word-aligned LDR, LDRT, and the load access of a SWP rotate right the word-aligned data transferred
by a non word-aligned address one, two, or three bytes depending on the value of address[1:0].
Non word-aligned STR, STRT, and the store access of a SWP ignore address[1:0].
From ARMv5TE, it is IMPLEMENTATION DEFINED whether LDRD and STRD must be
doubleword-aligned or word-aligned. LDRD and STRD instructions that do not meet the alignment
requirement are UNPREDICTABLE.
Non word-aligned LDM, LDC, LDC2, and POP ignore address[1:0].
Non word-aligned STM, STC, STC2, and PUSH ignore address[1:0].
For Thumb instructions when SCTLR.A == 0:
Non halfword-aligned LDRH, LDRSH, and STRH are UNPREDICTABLE.
Non word-aligned LDR, and STR are UNPREDICTABLE.
Non word-aligned LDMIA, and POP ignore address[1:0].
Non word-aligned STMIA, and PUSH ignore address[1:0].
For ARM and Thumb instructions, alignment checking is defined for implementations supporting CP15,
specifically the SCTLR.A bit. When this bit is set, a Data Abort exception indicating an Alignment fault is
generated for unaligned accesses. When SCTLR.A = 1, whether the alignment check for an LDRD or STRD
instruction is for doubleword-alignment or word-alignment depends on the implementation choice of which
alignments are supported for these instructions when SCTLR.A = 0.
Note
The option of word alignment for LDRD and STRD instructions is not permitted in the ARMv6 legacy
configuration where SCTLR.U == 0 and SCTLR.A == 1. For more information, see legacy alignment
support in Alignment on page AppxG-6.
AppxH-6 Copyright © 1996-1998, 2000, 2004-2008 ARM Limited. All rights reserved. ARM DDI 0406B