ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

Recommended External Debug Interface
has stallable accesses
has slave-generated aborts
has 10 address bits ([11:2]) mapping 4KB of memory.
An extra signal, PADDRDBG[31], informs the debug slave port of the source of the access, as shown in
Table A-2.
Table A-2 lists the external debug interface signals.
Name Direction Description
Table A-2 Recommended external debug interface signals
PSELDBG In Selects the external debug interface
PADDRDBG[31,11:2] In Address. see PADDRDBG on page AppxA-15
PRDATADBG[31:0] Out Read data
PWDATADBG[31:0] In Write data
PENABLEDBG In Indicates a second and subsequent cycle of a transfer
PREADYDBG Out Used to extend a transfer, by inserting wait states
PSLVERRDBG Out Slave-generated error response, see PSLVERRDBG on
page AppxA-15
PWRITEDBG In Distinguishes between a read (LOW) and a write (HIGH)
PCLKDBG In Clock
PCLKENDBG In Clock enable for PCLKDBG
AppxA-14 Copyright © 1996-1998, 2000, 2004-2008 ARM Limited. All rights reserved. ARM DDI 0406B