ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

The Instruction Sets
A4.4 Data-processing instructions
Core data-processing instructions belong to one of the following groups:
Standard data-processing instructions. These instructions perform basic data-processing operations,
and share a common format with some variations.
Shift instructions on page A4-10.
Saturating instructions on page A4-13.
Packing and unpacking instructions on page A4-14.
Miscellaneous data-processing instructions on page A4-15.
Parallel addition and subtraction instructions on page A4-16.
Divide instructions on page A4-17.
For extension data-processing instructions, see Advanced SIMD data-processing operations on page A4-30
and VFP data-processing instructions on page A4-38.
A4.4.1 Standard data-processing instructions
These instructions generally have a destination register Rd, a first operand register Rn, and a second
operand. The second operand can be another register Rm, or an immediate constant.
If the second operand is an immediate constant, it can be:
Encoded directly in the instruction.
A modified immediate constant that uses 12 bits of the instruction to encode a range of constants.
Thumb and ARM instructions have slightly different ranges of modified immediate constants. For
details see Modified immediate constants in Thumb instructions on page A6-17 and Modified
immediate constants in ARM instructions on page A5-9.
If the second operand is another register, it can optionally be shifted in any of the following ways:
LSL Logical Shift Left by 1-31 bits.
LSR Logical Shift Right by 1-32 bits.
ASR Arithmetic Shift Right by 1-32 bits.
ROR Rotate Right by 1-31 bits.
RRX Rotate Right with Extend. For details see Shift and rotate operations on page A2-5.
In Thumb code, the amount to shift by is always a constant encoded in the instruction. In ARM code, the
amount to shift by is either a constant encoded in the instruction, or the value of a register Rs.
For instructions other than CMN, CMP, TEQ, and TST, the result of the data-processing operation is placed in the
destination register. In the ARM instruction set, the destination register can be the PC, causing the result to
be treated as an address to branch to. In the Thumb instruction set, this is only permitted for some 16-bit
forms of the ADD and MOV instructions.
A4-8 Copyright © 1996-1998, 2000, 2004-2008 ARM Limited. All rights reserved. ARM DDI 0406B