ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

Virtual Memory System Architecture (VMSA)
B3.13 Pseudocode details of VMSA memory system operations
This section contains pseudocode describing VMSA memory operations. The following subsections
describe the pseudocode functions:
Alignment fault
FCSE translation
Address translation on page B3-157
Domain checking on page B3-157
TLB operations on page B3-158
Translation table walk on page B3-158.
See also the pseudocode for general memory system operations in Pseudocode details of general memory
system operations on page B2-29.
B3.13.1 Alignment fault
The following pseudocode describes the generation of an Alignment fault Data Abort exception:
// AlignmentFaultV()
// =================
AlignmentFaultV(bits(32) address, boolean iswrite)
mva = FCSETranslate(address);
DataAbort(mva, bits(4) UNKNOWN, boolean UNKNOWN, iswrite, DAbort_Alignment);
B3.13.2 FCSE translation
The following pseudocode describes the FCSE translation:
// FCSETranslate()
// ===============
bits(32) FCSETranslate(bits(32) va)
if va == ‘0000000’ then
mva = FCSEIDR.PID : va;
else
mva = va;
return mva;
B3-156 Copyright © 1996-1998, 2000, 2004-2008 ARM Limited. All rights reserved. ARM DDI 0406B