ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

The System Level Programmers’ Model
All CP15 CDP, CDP2, LDC, LDC2, MCR2, MCRR, MCRR2, MRC2, MRRC, MRRC2, STC, and STC2 instructions are UNDEFINED.
B1.7.2 Access controls on CP0 to CP13
Coprocessors CP0 to CP13 might be required for optional features of the ARMv7 implementation. In
particular, CP10 and CP11 are used to support floating-point operations through the VFP and Advanced
SIMD extensions to the architecture, see Advanced SIMD and floating-point support on page B1-64.
Coprocessors CP0 to CP7 can be used to provide IMPLEMENTATION DEFINED vendor specific features.
Access to the coprocessors CP0 to CP13 is controlled by the Coprocessor Access Control Register, see:
c1, Coprocessor Access Control Register (CPACR) on page B3-104 for a VMSA implementation
c1, Coprocessor Access Control Register (CPACR) on page B4-51 for a PMSA implementation.
Initially on power up or reset, access to coprocessors CP0 to CP13 is disabled.
When the Security Extensions are implemented, the Non-Secure Access Control Register determines which
of the CP0 to CP13 coprocessors can be accessed from the Non-secure state, see c1, Non-Secure Access
Control Register (NSACR) on page B3-110.
Note
When an implementation includes either or both of the VFP and Advanced SIMD extensions, the
access settings for CP10 and CP11 must be identical. If these settings are not identical the behavior
of the extensions is UNPREDICTABLE.
To check which coprocessors are implemented:
1. If required, read the Coprocessor Access Control Register and save the value.
2. Write the value 0x0FFFFFFF to the register, to write 0b11 to the access field for each of the
coprocessors CP13 to CP0.
3. Read the Coprocessor Access Control Register again and check the access field for each
coprocessor:
if the access field value is 0b00 the coprocessor is not implemented
if the access field value is 0b11 the coprocessor is implemented.
4. If required, write the value from stage 1 back to the register to restore the original value.
ARM DDI 0406B Copyright © 1996-1998, 2000, 2004-2008 ARM Limited. All rights reserved. B1-63