ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

Instruction Details
A8.6.227 TEQ (immediate)
Test Equivalence (immediate) performs a bitwise exclusive OR operation on a register value and an
immediate value. It updates the condition flags based on the result, and discards the result.
Encoding T1 ARMv6T2, ARMv7
TEQ ,#
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
1 1 1 1 0 i 0 0 1 0 0 1 Rn 0 imm3 1 1 1 1 imm8
n = UInt(Rn);
(imm32, carry) = ThumbExpandImm_C(i:imm3:imm8, APSR.C);
if BadReg(n) then UNPREDICTABLE;
Encoding A1 ARMv4*, ARMv5T*, ARMv6*, ARMv7
TEQ ,#
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
cond 0 0 1 1 0 0 1 1 Rn (0) (0) (0) (0) imm12
n = UInt(Rn);
(imm32, carry) = ARMExpandImm_C(imm12, APSR.C);
A8-448 Copyright © 1996-1998, 2000, 2004-2008 ARM Limited. All rights reserved. ARM DDI 0406B