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ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

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Debug Events<br />

If these guidelines are not followed, a debug event might occur before the h<strong>and</strong>ler has saved the context of<br />

the abort, causing the context to be overwritten. This loss of context results in UNPREDICTABLE software<br />

behavior. The context that might be corrupted by such an event includes LR_abt, SPSR_abt, IFAR, DFAR,<br />

<strong>and</strong> DFSR.<br />

Debug events in the debug monitor<br />

Because debug exceptions generate Data Abort or Prefetch Abort exceptions, the precautions outlined in the<br />

section Debug exceptions in abort h<strong>and</strong>lers on page C3-25 also apply to debug monitors. The suggested<br />

settings for breakpoints <strong>and</strong> watchpoints that can avoid taking debug exceptions in a Data Abort h<strong>and</strong>ler can<br />

be used to avoid taking debug exceptions in the debug monitor.<br />

In addition, particularly on <strong>ARM</strong>v7 processors that do not implement the Extended CP14 interface, <strong>and</strong><br />

particularly those that implement synchronous Watchpoint debug events, when Monitor debug-mode is<br />

enabled debuggers must avoid:<br />

setting Watchpoint debug events on the addresses of debug registers<br />

setting Breakpoint <strong>and</strong> Vector Catch debug events on the addresses of instructions in the debug<br />

monitor.<br />

In particular, it is unwise to set a watchpoint on the address of the Watchpoint Control Register (DBGWCR)<br />

for that watchpoint, or to set a breakpoint on the address of an instruction that disables the breakpoint.<br />

The section Generation of debug events on page C3-40 identifies two problem cases:<br />

A write to the DBGWCR for a watchpoint set on the address of that DBGWCR, to disable that<br />

watchpoint, triggers the watchpoint.<br />

In this case:<br />

— if watchpoints are asynchronous, the write to the DBGWCR still takes place <strong>and</strong> the<br />

watchpoint is disabled. The debug software must then deal with the re-entrant debug<br />

exception.<br />

— if watchpoints are synchronous the value in the DBGWCR after the watchpoint is signaled is<br />

unchanged, <strong>and</strong> the debug event is left enabled.<br />

an instruction that disables a breakpoint on that instruction triggers the breakpoint.<br />

In this case, the debug exception is taken before the debug event is disabled.<br />

In both of these cases it might be impossible to recover.<br />

Monitor debug-mode vector catch on Secure Monitor Call<br />

Debuggers must be cautious about programming a Vector Catch debug event on the Secure Monitor Call<br />

(SMC) vector when Monitor debug-mode is configured. If such an event is programmed, the following<br />

sequence can occur:<br />

1. Non-secure code executes an SMC instruction.<br />

C3-26 Copyright © 1996-1998, 2000, 2004-2008 <strong>ARM</strong> Limited. All rights reserved. <strong>ARM</strong> DDI 0406B

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