ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

Glossary
Should-Be-Zero-or-Preserved (SBZP)
Must be written as 0, or all 0s for a bit field, by software if the value is being written without having been
previously read, or if the register has not been initialized. Where the register was previously read on the same
processor, since the processor was last reset, the value in the field should be preserved by writing the value
that was previously read.
Hardware must ignore writes to these fields.
If a value is written to the field that is neither 0 (or all 0s for a bit field), nor a value previously read for the
same field on the same processor, the result is UNPREDICTABLE.
Signaling NaNs
Cause an Invalid Operation exception whenever any floating-point operation receives a signaling NaN as an
operand. Signaling Nans can be used in debugging, to track down some uses of uninitialized variables.
Signed data types
Represent an integer in the range −2 N−1 to +2 N−1– 1, using two's complement format.
Signed immediate and offset fields
Are encoded in two’s complement notation unless otherwise stated.
SIMD Means Single-Instruction, Multiple-Data operations.
Single-copy atomicity
Is the form of atomicity described in Single-copy atomicity on page A3-27.
See also Atomicity, Multi-copy atomicity.
Single-precision value
Is a 32-bit word, that must be word-aligned when held in memory, and that is interpreted as a basic
single-precision floating-point number according to the IEEE 754-1985 standard.
Spatial locality
Is the observed effect that after a program has accessed a memory location, it is likely to also access nearby
memory locations in the near future. Caches with multi-word cache lines exploit this effect to improve
performance.
SUBARCHITECTURE DEFINED
Means that the behavior is expected to be specified by a subarchitecture definition. Typically, this will be
shared by multiple implementations, but it must only be relied on by specified types of code. This minimizes
the software changes required when a new subarchitecture has to be developed.
In this manual, subarchitecture definitions are used for:
the interface between a VFP implementation and its support code
the interface between an implementation of the Jazelle extension and an Enabled JVM.
Tag bits Are bits [31:L+S]) of a virtual address, where L = log2(cache line length) and
S=log2(number of cache sets). A cache hit occurs if the tag bits of the virtual address supplied by the ARM
processor match the tag bits associated with a valid line in the selected cache set.
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