ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

Assembler syntax
CB{N}Z ,
where:
Instruction Details
N If specified, causes the branch to occur when the contents of are nonzero (encoded as
op = 1). If omitted, causes the branch to occur when the contents of are zero (encoded
as op = 0).
See Standard assembler syntax fields on page A8-7. A CBZ or CBNZ instruction must be
unconditional.
The operand register.
The label of the instruction that is to be branched to. The assembler calculates the required
value of the offset from the PC value of the CB{N}Z instruction to this label, then selects an
encoding that sets imm32 to that offset. Permitted offsets are even numbers in the range 0 to
126.
Operation
EncodingSpecificOperations();
if nonzero ^ IsZero(R[n]) then
BranchWritePC(PC + imm32);
Exceptions
None.
ARM DDI 0406B Copyright © 1996-1998, 2000, 2004-2008 ARM Limited. All rights reserved. A8-67