ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

Application Level Programmers’ Model
The values contained in configuration registers are changed only by the execution of MCR instructions.
In particular, they are never changed by Jazelle state execution of bytecodes.
The access policy for the required registers is fully defined in their descriptions. With unprivileged
operation:
— all MCR accesses to the JIDR are UNDEFINED
— MRC and MCR accesses that are restricted to privileged modes are UNDEFINED.
The access policy of other configuration registers is SUBARCHITECTURE DEFINED.
When the Security Extensions are implemented, the registers are common to the Secure and
Non-secure security states. For more information, see Effect of the Security Extensions on the CP15
registers on page B3-71. This section applies to some CP14 registers as well as to the CP15 registers.
When a configuration register is readable, reading the register returns the last value written to it.
Reading a readable configuration register has no side effects.
When a configuration register is not readable, attempting to read it returns an UNKNOWN value.
When a configuration register can be written, the effect of writing to it must be idempotent. That is,
the overall effect of writing the same value more than once must not differ from the effect of writing
it once.
Changes to these CP14 registers have the same synchronization requirements as changes to the CP15
registers. These are described in:
Changes to CP15 registers and the memory order model on page B3-77 for a VMSA implementation
Changes to CP15 registers and the memory order model on page B4-28 for a PMSA implementation.
For more information, see Jazelle state configuration and control on page B1-77.
Jazelle ID Register (JIDR)
The Jazelle ID Register (JIDR) enables an EJVM to determine the architecture and subarchitecture under
which it is running.
The JIDR is:
a CP14 register
a 32-bit read-only register
accessible during privileged and unprivileged execution
when the Security Extensions are implemented, a Common register, see Common CP15 registers on
page B3-74.
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