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ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

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Assembler syntax<br />

SMLALD{X} , , , <br />

where:<br />

X If X is present, the multiplications are bottom × top <strong>and</strong> top × bottom.<br />

If the X is omitted, the multiplications are bottom × bottom <strong>and</strong> top × top.<br />

See St<strong>and</strong>ard assembler syntax fields on page A8-7.<br />

Instruction Details<br />

Supplies the lower 32 bits of the accumulate value, <strong>and</strong> is the destination register for the<br />

lower 32 bits of the result.<br />

Supplies the upper 32 bits of the accumulate value, <strong>and</strong> is the destination register for the<br />

upper 32 bits of the result.<br />

The first oper<strong>and</strong> register.<br />

The second oper<strong>and</strong> register.<br />

Operation<br />

if ConditionPassed() then<br />

EncodingSpecificOperations();<br />

oper<strong>and</strong>2 = if m_swap then ROR(R[m],16) else R[m];<br />

product1 = SInt(R[n]) * SInt(oper<strong>and</strong>2);<br />

product2 = SInt(R[n]) * SInt(oper<strong>and</strong>2);<br />

result = product1 + product2 + SInt(R[dHi]:R[dLo]);<br />

R[dHi] = result;<br />

R[dLo] = result;<br />

Exceptions<br />

None.<br />

<strong>ARM</strong> DDI 0406B Copyright © 1996-1998, 2000, 2004-2008 <strong>ARM</strong> Limited. All rights reserved. A8-339

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