ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ThumbEE
A9.4.2 LDRH (register)
Load Register Halfword (register) calculates an address from a base register value and an offset register
value, loads a halfword from memory, zero-extends it to form a 32-bit word, and writes it to a register. The
offset register value is shifted left by 1 bit. For information about memory accesses see Memory accesses
on page A8-13.
The similar Thumb instruction does not have a left shift.
Encoding T1 ThumbEE
LDRH ,[,, LSL #1]
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 1 0 1 1 0 1 Rm Rn Rt
t = UInt(Rt); n = UInt(Rn); m = UInt(Rm);
Assembler syntax
LDRH , [, , LSL #1]
where:
See Standard assembler syntax fields on page A8-7.
The destination register.
The base register.
Contains the offset that is shifted and applied to the value of to form the address.
Operation
if ConditionPassed() then
EncodingSpecificOperations(); NullCheckIfThumbEE(n);
address = R[n] + LSL(R[m],1);
R[t] = ZeroExtend(MemU[address,2], 32);
Exceptions and checks
Data Abort, NullCheck.
A9-10 Copyright © 1996-1998, 2000, 2004-2008 ARM Limited. All rights reserved. ARM DDI 0406B