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ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

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The CPUID Identification Scheme<br />

FtZ mode, bits [7:4]<br />

Indicates whether the VFP hardware implementation supports only the Flush-to-Zero mode<br />

of operation. Permitted values are:<br />

0b0000 Hardware supports only the Flush-to-Zero mode of operation. If a VFP<br />

subarchitecture is implemented its support code might include support for full<br />

denormalized number arithmetic.<br />

0b0001 Hardware supports full denormalized number arithmetic.<br />

B5.3.3 Accessing the Advanced SIMD <strong>and</strong> VFP feature identification registers<br />

You access the Advanced SIMD <strong>and</strong> VFP feature identification registers using the VMRS instruction, see<br />

VMRS on page A8-658.<br />

For example:<br />

VMRS , FPSID ; Read Floating-Point System ID Register<br />

VMRS , MVFR1 ; Read Media <strong>and</strong> VFP Feature Register 1<br />

B5-40 Copyright © 1996-1998, 2000, 2004-2008 <strong>ARM</strong> Limited. All rights reserved. <strong>ARM</strong> DDI 0406B

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