ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

Assembler syntax
LDRH , [, {, LSL #}] Offset: index==TRUE, wback==FALSE
LDRH , [, +/-] Offset: index==TRUE, wback==FALSE
LDRH , [, +/-]! Pre-indexed: index==TRUE, wback==TRUE
LDRH , [], +/- Post-indexed: index==FALSE, wback==TRUE
where:
See Standard assembler syntax fields on page A8-7.
The destination register.
Instruction Details
The base register. The SP can be used. The PC can be used only in the ARM instruction set.
+/- Is + or omitted if the optionally shifted value of is to be added to the base register value
(add == TRUE), or – if it is to be subtracted (permitted in ARM code only, add == FALSE).
Contains the offset that is optionally left shifted and added to the value of to form the
address.
If present, the size of the left shift to apply to the value from , in the range 1-3. Only
encoding T2 is permitted, and is encoded in imm2.
If absent, no shift is specified and all encodings are permitted. In encoding T2, imm2 is
encoded as 0b00.
The pre-UAL syntax LDRH is equivalent to LDRH.
Operation
if ConditionPassed() then
EncodingSpecificOperations(); NullCheckIfThumbEE(n);
offset = Shift(R[m], shift_t, shift_n, APSR.C);
offset_addr = if add then (R[n] + offset) else (R[n] - offset);
address = if index then offset_addr else R[n];
data = MemU[address,2];
if wback then R[n] = offset_addr;
if UnalignedSupport() || address = ‘0’ then
R[t] = ZeroExtend(data, 32);
else // Can only apply before ARMv7
R[t] = bits(32) UNKNOWN;
Exceptions
Data Abort.
ARM DDI 0406B Copyright © 1996-1998, 2000, 2004-2008 ARM Limited. All rights reserved. A8-157