ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

A4.3 Branch instructions
The Instruction Sets
Table A4-1 summarizes the branch instructions in the ARM and Thumb instruction sets. In addition to
providing for changes in the flow of execution, some branch instructions can change instruction set.
Instruction See
Table A4-1 Branch instructions
Range
(Thumb)
Range
(ARM)
Branch to target address B on page A8-44 +/–16MB +/–32MB
Compare and Branch on Nonzero, Compare
and Branch on Zero
Call a subroutine
Call a subroutine, change instruction setb Call a subroutine, optionally change instruction
set
CBNZ, CBZ on page A8-66 0-126B a
BL, BLX (immediate) on page A8-58 +/–16MB
+/–16MB
BLX (register) on page A8-60 Any Any
Branch to target address, change instruction set BX on page A8-62 Any Any
Change to Jazelle state BXJ on page A8-64 - -
Table Branch (byte offsets)
Table Branch (halfword offsets)
TBB, TBH on page A8-446 0-510B
0-131070B
a. These instructions do not exist in the ARM instruction set.
b. The range is determined by the instruction set of the BLX instruction, not of the instruction it branches to.
+/–32MB
+/–32MB
Branches to loaded and calculated addresses can be performed by LDR, LDM and data-processing instructions.
For details see Load/store instructions on page A4-19, Load/store multiple instructions on page A4-22,
Standard data-processing instructions on page A4-8, and Shift instructions on page A4-10.
ARM DDI 0406B Copyright © 1996-1998, 2000, 2004-2008 ARM Limited. All rights reserved. A4-7
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