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ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

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Advanced SIMD <strong>and</strong> VFP Instruction Encoding<br />

1 0x00<br />

1000<br />

0x01<br />

1001<br />

0x10<br />

1010<br />

0x11<br />

1011<br />

Vector Store VST1 (single element from one lane) on page A8-770<br />

Vector Store VST2 (single 2-element structure from one lane) on page A8-774<br />

Vector Store VST3 (single 3-element structure from one lane) on page A8-778<br />

Vector Store VST4 (single 4-element structure from one lane) on page A8-782<br />

A B Instruction See<br />

0 0010<br />

011x<br />

1010<br />

0011<br />

100x<br />

Table A7-20 Element <strong>and</strong> structure store instructions (L == 0) (continued)<br />

A B Instruction See<br />

Table A7-21 Element <strong>and</strong> structure load instructions (L == 1)<br />

Vector Load VLD1 (multiple single elements) on page A8-602<br />

Vector Load VLD2 (multiple 2-element structures) on page A8-608<br />

010x Vector Load VLD3 (multiple 3-element structures) on page A8-614<br />

000x Vector Load VLD4 (multiple 4-element structures) on page A8-620<br />

A7-28 Copyright © 1996-1998, 2000, 2004-2008 <strong>ARM</strong> Limited. All rights reserved. <strong>ARM</strong> DDI 0406B

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