ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

The Instruction Sets
A4.9 Exception-generating and exception-handling instructions
The following instructions are intended specifically to cause a processor exception to occur:
The Supervisor Call (SVC, previously SWI) instruction is used to cause an SVC exception to occur. This
is the main mechanism for User mode code to make calls to privileged operating system code. For
more information, see Supervisor Call (SVC) exception on page B1-52.
The Breakpoint instruction BKPT provides for software breakpoints. For more information, see About
debug events on page C3-2.
In privileged system level code, the Secure Monitor Call (SMC, previously SMI) instruction. For more
information, see Secure Monitor Call (SMC) exception on page B1-53.
System level variants of the SUBS and LDM instructions can be used to return from exceptions. From ARMv6,
the SRS instruction can be used near the start of an exception handler to store return information, and the RFE
instruction can be used to return from an exception using the stored return information. For details of these
instructions, see Chapter B6 System Instructions.
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