ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

Assembler syntax
VQDMULL. , ,
VQDMULL. , ,
where:
Instruction Details
See Standard assembler syntax fields on page A8-7. An ARM VQDMULL instruction must be
unconditional.
The data type for the elements of the operands. It must be one of:
S16 encoded as size = 0b01
S32 encoded as size = 0b10.
, The destination vector and the first operand vector.
The second operand vector, for an all vector operation.
The scalar for a scalar operation. If is S16, Dm is restricted to D0-D7. If is S32, Dm is
restricted to D0-D15.
Operation
if ConditionPassed() then
EncodingSpecificOperations(); CheckAdvSIMDEnabled();
if scalar_form then op2 = SInt(Elem[D[m],index,esize]);
for e = 0 to elements-1
if !scalar_form then op2 = SInt(Elem[D[m],e,esize]);
op1 = SInt(Elem[D[n],e,esize]);
// The following only saturates if both op1 and op2 equal -(2^(esize-1))
(product, sat) = SignedSatQ(2*op1*op2, 2*esize);
Elem[Q[d>>1],e,2*esize] = product;
if sat then FPSCR.QC = ‘1’;
Exceptions
Undefined Instruction.
ARM DDI 0406B Copyright © 1996-1998, 2000, 2004-2008 ARM Limited. All rights reserved. A8-707