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ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

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A.1.1 Authentication signals<br />

DBGEN, NIDEN, SPIDEN <strong>and</strong> SPNIDEN are the authentication signals.<br />

Recommended External Debug Interface<br />

DBGROMADDR[31:12] In v7 only ROM Table physical address DBGROMADDR <strong>and</strong><br />

DBGROMADDRV In v7 only ROM Table physical address<br />

valid<br />

NIDEN <strong>and</strong> SPNIDEN can be omitted if no non-invasive debug features are implemented.<br />

SPIDEN <strong>and</strong> SPNIDEN can be omitted if Security Extensions are not implemented.<br />

When DBGEN is LOW, indicating that debug is disabled:<br />

Halting debug events are ignored<br />

except for ignoring Halting debug events, the processor behaves as if DBGDSCR[15:14] == 0b00,<br />

meaning that Monitor debug-mode <strong>and</strong> Halting debug-mode are both disabled. For more information,<br />

see Debug Status <strong>and</strong> Control Register (DBGDSCR) on page C10-10.<br />

For details of how these signals control enabling of invasive <strong>and</strong> non-invasive debug see Chapter C2<br />

Invasive Debug Authentication <strong>and</strong> Chapter C7 Non-invasive Debug Authentication.<br />

Note<br />

The v7 Debug architecture authentication signal interface described here is compatible with the CoreSight<br />

architecture requirements for the authentication interface of a debug component. However the CoreSight<br />

architecture places additional requirements on other components in the system. For more information, see<br />

the CoreSight <strong>Architecture</strong> Specification.<br />

SPIDEN also controls permissions in Debug state. For details see Privilege in Debug state on page C5-13.<br />

See also Authentication Status Register (DBGAUTHSTATUS) on page C10-96.<br />

DBGROMADDRV on<br />

page AppxA-10<br />

DBGSELFADDR[31:12] In v7 only Debug self-address offset DBGSELFADDR <strong>and</strong><br />

DBGSELFADDRV In v7 only Debug self-address offset<br />

valid<br />

Table A-1 Miscellaneous debug signals (continued)<br />

Name Direction Versions Description Section<br />

DBGSELFADDRV on<br />

page AppxA-10<br />

DBGSWENABLE In v7 only Debug software access enable DBGSWENABLE on<br />

page AppxA-11<br />

PRESETDBGn In v7 only Debug logic reset PRESETDBGn on<br />

page AppxA-12<br />

<strong>ARM</strong> DDI 0406B Copyright © 1996-1998, 2000, 2004-2008 <strong>ARM</strong> Limited. All rights reserved. AppxA-3

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