ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

Assembler syntax
PLD[W] [, +/- {, }]
where:
Instruction Details
W If specified, selects PLDW, encoded as W = 1 in Thumb encodings and R = 0 in ARM
encodings. If omitted, selects PLD, encoded as W = 0 in Thumb encodings and R = 1 in
ARM encodings.
See Standard assembler syntax fields on page A8-7. An ARM PLD or PLDW instruction must
be unconditional.
Is the base register. The SP can be used.
+/- Is + or omitted if the optionally shifted value of is to be added to the base register value
(add == TRUE), or – if it is to be subtracted (permitted in ARM code only, add == FALSE).
Contains the offset that is optionally shifted and applied to the value of to form the
address.
The shift to apply to the value read from . If absent, no shift is applied. For encoding
T1, can only be omitted, encoded as imm2 = 0b00, or LSL # with = 1, 2,
or 3, with encoded in imm2. For encoding A1, see Shifts applied to a register on
page A8-10.
Operation
if ConditionPassed() then
EncodingSpecificOperations();
offset = Shift(R[m], shift_t, shift_n, APSR.C);
address = if add then (R[n] + offset) else (R[n] - offset);
if is_pldw then
Hint_PreloadDataForWrite(address);
else
Hint_PreloadData(address);
Exceptions
None.
ARM DDI 0406B Copyright © 1996-1998, 2000, 2004-2008 ARM Limited. All rights reserved. A8-241