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ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

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A9.3 Additional instructions in Thumb <strong>and</strong> ThumbEE instruction sets<br />

ThumbEE<br />

On a processor with the ThumbEE extension, there are two additional 32-bit instructions, ENTERX <strong>and</strong> LEAVEX.<br />

These are available in both Thumb state <strong>and</strong> ThumbEE state.<br />

A9.3.1 ENTERX, LEAVEX<br />

ENTERX causes a change from Thumb state to ThumbEE state, or has no effect in ThumbEE state.<br />

LEAVEX causes a change from ThumbEE state to Thumb state, or has no effect in Thumb state.<br />

Encoding T1 ThumbEE<br />

ENTERX Not permitted in IT block.<br />

LEAVEX Not permitted in IT block.<br />

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0<br />

1 1 1 1 0 0 1 1 1 0 1 1 (1)(1)(1) (1) 1 0 (0) 0 (1)(1)(1)(1) 0 0 0 J (1)(1)(1)(1)<br />

is_enterx = (J == ‘1’);<br />

Assembler syntax<br />

ENTERX Encoded as J = 1<br />

LEAVEX Encoded as J = 0<br />

where:<br />

See St<strong>and</strong>ard assembler syntax fields on page A8-7. An ENTERX or LEAVEX instruction must<br />

be unconditional.<br />

Operation<br />

if is_enterx then<br />

SelectInstrSet(InstrSet_ThumbEE);<br />

else<br />

SelectInstrSet(InstrSet_Thumb);<br />

Exceptions<br />

None.<br />

<strong>ARM</strong> DDI 0406B Copyright © 1996-1998, 2000, 2004-2008 <strong>ARM</strong> Limited. All rights reserved. A9-7

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