ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

Assembler syntax
VSHLL. , , #
where:
Instruction Details
See Standard assembler syntax fields on page A8-7. An ARM VSHLL instruction must be
unconditional.
The data type for the elements of the operand. It must be one of:
S encoded as U = 0 in encoding T1 / A1
U encoded as U = 1 in encoding T1 / A1
I available only in encoding T2 / A2.
The data size for the elements of the operand. It must be one of:
8 encoded as imm6 = ’001’ or size = ’00’
16 encoded as imm6 = ’01’ or size = ’01’
32 encoded as imm6 = ’1’ or size = ’10’.
, The destination vector and the operand vector.
The immediate value. must lie in the range 1 to :
Operation
if = , encoding is T2 / A2
if =8, is encoded in imm6
if = 16, is encoded in imm6
if = 32, is encoded in imm6.
if ConditionPassed() then
EncodingSpecificOperations(); CheckAdvSIMDEnabled();
for e = 0 to elements-1
result = Int(Elem[D[m],e,esize], unsigned) >1],e,2*esize] = result;
Exceptions
Undefined Instruction.
ARM DDI 0406B Copyright © 1996-1998, 2000, 2004-2008 ARM Limited. All rights reserved. A8-755