05.02.2013 Views

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

SHOW MORE
SHOW LESS

You also want an ePaper? Increase the reach of your titles

YUMPU automatically turns print PDFs into web optimized ePapers that Google loves.

Debug Events<br />

BreakpointDebugEvent()<br />

VectorCatchDebugEvent()<br />

WatchpointDebugEvent()<br />

If the debug event is not permitted, it is ignored by the processor.<br />

Breakpoints <strong>and</strong> Vector Catches<br />

If invasive debug is enabled, on each instruction the Debug_CheckInstruction() function checks for BRP <strong>and</strong><br />

DBGVCR matches. If a match is found the function calls BreakpointDebugEvent() or<br />

VectorCatchDebugEvent(). If the debug event is not permitted, it is ignored by the processor.<br />

On a simple sequential execution model, the Debug_CheckInstruction() call for an instruction occurs just<br />

before the Operation pseudocode for the instruction is executed, <strong>and</strong> any call it generates to<br />

BreakpointDebugEvent() or VectorCatchDebugEvent() must happen at that time. However, the architecture<br />

does not define when the checks for BRP <strong>and</strong> DBGVCR matches are made, other than that they must be<br />

made at or before that time. Therefore an implementation can perform the checks much earlier in an<br />

instruction pipeline, marking the instruction as breakpointed, <strong>and</strong> cause a marked instruction to call<br />

BreakpointDebugEvent() or VectorCatchDebugEvent() if <strong>and</strong> when it is about to execute.<br />

The BRPMatch() function checks an individual BRP match, calling the BRPLinkMatch() function if necessary<br />

to check whether a linked BRP matches.<br />

The VCRMatch() function checks for a Vector Catch debug event. When vectored interrupt support is enabled,<br />

it uses variables to hold the IRQ <strong>and</strong> FIQ interrupt vector addresses supplied to the processor by the interrupt<br />

controller on taking an interrupt in IRQ mode or FIQ mode. These variables are updated by the<br />

VCR_OnTakingInterrupt() function, that is called each time the processor takes an IRQ or FIQ interrupt.<br />

For all of these functions, between a context changing operation <strong>and</strong> an exception entry, exception return or<br />

explicit Instruction Synchronization Barrier (ISB) operation, it is UNPREDICTABLE whether the values of<br />

CurrentModeIsPrivileged(), CPSR.M, CurrentInstrSet(), FindSecure(), <strong>and</strong> the CONTEXTIDR used by<br />

BRPMatch(), BRPLinkMatch(), <strong>and</strong> VCRMatch() are the old or the new values.<br />

// Debug_CheckInstruction()<br />

// ========================<br />

Debug_CheckInstruction(bits(32) address, integer length)<br />

// Do nothing if debug disabled.<br />

if DBGDSCR == ‘00’ then return;<br />

case CurrentInstrSet() of<br />

when InstrSet_<strong>ARM</strong><br />

step = 4;<br />

when InstrSet_Thumb, InstrSet_ThumbEE<br />

step = 2;<br />

when InstrSet_Jazelle<br />

step = 1;<br />

length = length / step;<br />

vcr_match = FALSE;<br />

brp_match = FALSE;<br />

C3-28 Copyright © 1996-1998, 2000, 2004-2008 <strong>ARM</strong> Limited. All rights reserved. <strong>ARM</strong> DDI 0406B

Hooray! Your file is uploaded and ready to be published.

Saved successfully!

Ooh no, something went wrong!