ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

Second level Coarse page table descriptor format
ARMv4 and ARMv5 Differences
In a Coarse page table, each entry provides translation information for 4KB of memory. Large page table
entries must be repeated 16 times to ensure translation of all addresses in the page. Tiny pages are not
supported. Coarse page tables are 1KB in size and must be aligned on a 1KB boundary.
Table H-8 shows the translation table second level descriptor formats for a second level Coarse page table.
Table H-8 Second level Coarse page descriptor formats
31 16 15 14 12 11 10 9 8 7 6 5 4 3 2 1 0
Fault Ignore 0 0
Large page Large page base address
ARM DDI 0406B Copyright © 1996-1998, 2000, 2004-2008 ARM Limited. All rights reserved. AppxH-25
S
B
Z
TEX AP3 AP2 AP1 AP0 C B 0 1
Small page Small page base address AP3 AP2 AP1 AP0 C B 1 0
Extended
small page
Extended small page base address optional in ARMv5TE,
otherwise reserved
SBZ TEX AP C B 1 1