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ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

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Instruction Details<br />

A8.6.174 SMMLA<br />

Signed Most Significant Word Multiply Accumulate multiplies two signed 32-bit values, extracts the most<br />

significant 32 bits of the result, <strong>and</strong> adds an accumulate value.<br />

Optionally, you can specify that the result is rounded instead of being truncated. In this case, the constant<br />

0x80000000 is added to the product before the high word is extracted.<br />

Encoding T1 <strong>ARM</strong>v6T2, <strong>ARM</strong>v7<br />

SMMLA{R} ,,,<br />

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0<br />

1 1 1 1 1 0 1 1 0 1 0 1 Rn Ra Rd 0 0 0 R Rm<br />

if Ra == ‘1111’ then SEE SMMUL;<br />

d = UInt(Rd); n = UInt(Rn); m = UInt(Rm); a = UInt(Ra); round = (R == ‘1’);<br />

if BadReg(d) || BadReg(n) || BadReg(m) || a == 13 then UNPREDICTABLE;<br />

Encoding A1 <strong>ARM</strong>v6*, <strong>ARM</strong>v7<br />

SMMLA{R} ,,,<br />

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0<br />

cond 0 1 1 1 0 1 0 1 Rd Ra Rm 0 0 R 1 Rn<br />

if Ra == ‘1111’ then SEE SMMUL;<br />

d = UInt(Rd); n = UInt(Rn); m = UInt(Rm); a = UInt(Ra); round = (R == ‘1’);<br />

if d == 15 || n == 15 || m == 15 then UNPREDICTABLE;<br />

A8-346 Copyright © 1996-1998, 2000, 2004-2008 <strong>ARM</strong> Limited. All rights reserved. <strong>ARM</strong> DDI 0406B

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