ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

Instruction Details
A8.6.405 VSWP
VSWP (Vector Swap) exchanges the contents of two vectors. The vectors can be either doubleword or
quadword. There is no distinction between data types.
Encoding T1 / A1 Advanced SIMD
VSWP ,
VSWP ,
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
1 1 1 1 1 1 1 1 1 D 1 1 size 1 0 Vd 0 0 0 0 0 Q M 0 Vm
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
1 1 1 1 0 0 1 1 1 D 1 1 size 1 0 Vd 0 0 0 0 0 Q M 0 Vm
if size != ‘00’ then UNDEFINED;
if Q == ‘1’ && (Vd == ‘1’ || Vm == ‘1’) then UNDEFINED;
d = UInt(D:Vd); m = UInt(M:Vm); regs = if Q == ‘0’ then 1 else 2;
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